Using Make to compile large programs
===============================================================================

First create a file called "makefile" in the directory that contains all the *.h
and *.c files.  Here's a typical makefile:

     +----------------------------------------------------------
     | BINDIR = /usr/local/bin
     | CC = cc
     | #CC = gcc
     | #CC = /usr/5bin/cc
     | OBJS = main.o menu.o aux.o 
     | CFLAGS = -g
     |          
     | help: $(OBJS)
     |       $(CC) *.o -lcurses -ltermlib -o help $(CFLAGS)
     |          
     | aux.o: aux.c header.h
     |       $(CC) -c aux.c $(CFLAGS)
     |          
     | menu.o: menu.c header.h
     |       $(CC)  -c menu.c $(CFLAGS)
     |          
     | main.o: main.c header.h
     |       $(CC)  -c main.c $(CFLAGS)
     |          
     | install:
     |       mv ./help /usr/local/bin
     |       chmod 0755 /usr/local/bin/help
     +----------------------------------------------------------

The last four clumps are dependency rules, and have the general form

    target:  dep1  dep2  dep3 ...
           UNIX command 1
           UNIX command 2
                ...

Each of the UNIX commands MUST BEGIN WITH A TAB!!!!!

Each dep (dependency) is either a file or another target.   The way to read
a dependency rule is

    "Target depends on dep1 and on dep2 and also on dep3, ...
     If target is out of date with those deps, then do all the following
     UNIX commands."

A dependency rule is triggered if the time of last modification of ANY of
the deps is LATER THAN the time of last modification of the target.

The dependency rule does not even have to have deps in which case you can
trigger the rule by doing

      make target

such as

      make install 

above.

If you do not give a target as an argument to make, it seeks the first target
in the makefile and does it.

Comments can appear anywhere and are preceded by #.

The macro symbols, such as OBJS, CC, CFLAGS, etc. above, are all for your
convenience and so that you do not have to change more than one thing to change
your makefile.